There is a continued demand for enhanced levels of safety related features within microcontrollers having one or more masters and one or more peripherals. Currently microcontrollers implement several layers of protection between the masters and the peripherals, particularly those affecting device Input/Output (I/O) directly. Current designs have protection through, for example, the use of user/supervisor level access rights, address range based protection through a Memory Protection Unit (MPU) and a Memory Management Unit (MMU), and Process ID based protection. However, safety concerns remain, such as errant software, for example incorrect code operating at a given time, causes disruption and potentially affects I/O and a continued wish for enhanced level of safety against unwanted behaviour persists. Current designs may still be compromised due to an access by one of the masters to one of the slaves of a microcontroller that is not intended to occur, for example due to errant software executing.